In digital, or binary, multiplication there are three general approaches including: repeated addition, multiple-digit multiplication, and simultaneous multiplication. Generally, the repeated addition approach is the simplest and, while there are a variety of repeated addition methods, to increase the speed of the device it is desirable to minimize the longest propagation path as well as the total number of partial products which must be added. Several of the repeated addition methods, when implemented in combinational hardware, require sign bit extension of low order partial products and, thus, the logic becomes unwieldly. The repeated addition approach commonly referred to as the Burks-Goldstine-VonNeumann method, is implemented herein because it does not require sign bit extension and thereby minimizes hardware.